================================================================================ SCHEMATIC: TOROIDAL TRANSFORMER DIRECTIONAL COUPLER — HF BANDS TM-COUP-001 Rev A Bruene / Sontheimer bridge coupler: 1.8–30 MHz (160m–10m) Coupling: −20 dB / −30 dB / −40 dB versions Directivity: >30 dB (≥25 dB, 1.8–30 MHz) Insertion loss: <0.05 dB ================================================================================ REFERENCE DOCUMENTS: sch_detector_swr_output.txt — Detector, log amp, SWR calculation rf_power_monitor_esp32.ino — ESP32 firmware and CYD display enclosure_hf_coupler.scad — 3D-printable housing ================================================================================ SECTION 1 — OPERATING PRINCIPLE ================================================================================ The Bruene directional coupler (W1FB/Sontheimer design) uses a single toroidal current transformer in combination with a matched resistive voltage divider to achieve directional separation of forward and reflected power components. The sampling toroid T1 acts as a 1:N current transformer. The main transmission line passes once through the toroid core (1-turn primary). The secondary develops a voltage proportional to the main line current I_line: V_T = I_line × Z_L / N where Z_L = secondary load resistor (50Ω) The resistive voltage divider (R1, R2) samples the voltage across the line: V_R = V_line × (R1 / (R1 + R2)) These two samples are summed and differenced: V_fwd = V_T + V_R → forward wave detector D1 V_rev = V_T − V_R → reflected wave detector D2 When both V_T and V_R contributions are equal in magnitude: − Matched load (SWR=1): V_rev = 0 → maximum directivity − Open circuit: V_fwd = 2×V_T ; V_rev = 2×V_T → SWR = ∞ − Short circuit: V_fwd = 0 ; V_rev = 0 (signs cancel both) DESIGN BALANCE CONDITION (for maximum directivity): V_T = V_R at the reference impedance Z0 = 50Ω I_line × Z0/N = V_line × (R1/(R1+R2)) Since V_line = I_line × Z0 in a matched system: I_line × Z0/N = I_line × Z0 × (R1/(R1+R2)) Therefore: 1/N = R1/(R1+R2) → N = (R1+R2)/R1 With R1 = 50Ω and R2 = 50Ω: N = 100/50 = 2 (wrong — too few turns) With R1 = 5Ω and R2 = 45Ω: N = 50/5 = 10 turns → −20 dB coupling With R1 = 5Ω and R2 = 155Ω: N = 160/5 = 32 turns → −30 dB coupling With R1 = 5Ω and R2 = 495Ω: N = 500/5 = 100 turns → −40 dB coupling PRACTICAL: Use R1 = 50Ω, R2 = N×50 − 50Ω (matched to secondary impedance) ================================================================================ SECTION 2 — SCHEMATIC: −20 dB COUPLER (10 turns, HF) ================================================================================ POWER RATING: 100W SSB / 50W CW continuous. Derate 50% above 40°C ambient. CONNECTORS: SO-239 (main line), BNC or SMA (coupled ports) MAIN LINE: T1 core IN ──┬──────────────[>────────>─────────>]────────────────┬── OUT J1 │ (1 turn primary, pass-through) │ J2 SO239│ │ SO239 │ │ R1 (50Ω) R2 (50Ω) │ │ ├──────────────────────── GND ────────────────────────┤ │ │ SHIELD / GROUND PLANE Main line characteristic impedance: 50Ω Conductor: 14 AWG bare copper, 50mm between SO-239 centers Grounded shield / copper ground plane beneath main conductor TOROID T1 — SECONDARY (10 TURNS): ┌───────────────────────────────────────────┐ │ │ T1 sec ─┤ 10 turns ├─ │ FT-50-43 (HF) or FT-50-61 (HF/VHF) │ └────────────────────────────────────────────┘ 10T ● 10T ○ ●── T1 start ──┬── T1 end ──○ │ R_term (50Ω, 1W) ← balances secondary │ GND COMPLETE BRIDGE CIRCUIT: T1 (1:10 CT) 1T primary: main line (pass-through) 10T secondary: T1_start ─────────────────────────┬──── FWD detector (end 1 of secondary) │ R_A (50Ω) ← secondary termination │ GND Voltage divider on main line: IN ──R_1 (50Ω, 0.5W)──────── junction ──────── R_2 (50Ω, 0.5W) ──── OUT junction ────────────┬──── FWD detector │ │ REF detector ← T1_end │ GND SUMMING NETWORK (standard Bruene): T1_start (V_T+) ───[47Ω]───┬─── D1_anode → FWD │ R_divider tap (V_R) ─[47Ω]─┘ (V_T + V_R = forward component) T1_end (V_T−) ───[47Ω]───┬─── D2_anode → REF │ R_divider tap (V_R) ─[47Ω]─┘ (−V_T + V_R = reflected component) NOTE: This summation is the key to directivity. With matched load, V_T = V_R → D2 sees zero → reflected = 0. ================================================================================ SECTION 3 — COMPLETE PARTS LIST (−20 dB VERSION) ================================================================================ TOROIDS AND MAGNETICS: T1 1 FT-50-43 toroid core (1.8–30 MHz use, µ_i=850) ALT: FT-50-61 (10–200 MHz, wideband version) ALT: BN-43-302 binocular core (wider bandwidth, lower L_min) Wind: 10T #24 AWG enameled magnet wire, secondary Primary: 1T pass-through (main line conductor) RESISTORS (metal film, 1%, 50V rated): R1 1 50Ω, 0.5W (line tap divider — main line side) R2 1 50Ω, 0.5W (line tap divider — load side) R_T 1 50Ω, 1W (secondary termination resistor) R_fwd 1 47Ω, 0.25W (FWD summing resistor) R_ref 1 47Ω, 0.25W (REF summing resistor) R_L1 1 2.2kΩ, 0.25W (FWD detector load) R_L2 1 2.2kΩ, 0.25W (REF detector load) DIODES (Schottky, low forward voltage): D1 1 BAT41 or 1N5711 (FWD peak detector) D2 1 BAT41 or 1N5711 (REF peak detector) Match pair: Vf within 5mV at 1mA for best null accuracy CAPACITORS: C1 1 0.001 µF (1 nF) ceramic, 500V (FWD detector filter) C2 1 0.001 µF (1 nF) ceramic, 500V (REF detector filter) C_B 2 0.01 µF ceramic, 100V (bypass, each detector node) CONNECTORS: J1 1 SO-239 (input) J2 1 SO-239 (output / through) J3 1 BNC or SMA (FWD coupled port) J4 1 BNC or SMA (REF coupled port) BOARD: G-10 / FR4, 2oz copper, 50 × 100mm minimum Full ground plane on bottom layer Main line: 3mm wide copper, 50Ω microstrip if PCB routed ================================================================================ SECTION 4 — COUPLED POWER AND COUPLING FLATNESS ================================================================================ COUPLING COEFFICIENT: C = −20 log₁₀(N) = −20 log₁₀(10) = −20.0 dB COUPLING vs. FREQUENCY (FT-50-43, 10T secondary): Frequency | Coupling | Deviation | Notes -----------|-----------|-----------|--------------------------- 1.8 MHz | −20.5 dB | −0.5 dB | Core barely magnetizing; acceptable 3.5 MHz | −20.1 dB | −0.1 dB | Excellent 7.0 MHz | −20.0 dB | 0.0 dB | Reference 10.1 MHz | −19.9 dB | 0.0 dB | Excellent 14.0 MHz | −20.0 dB | 0.0 dB | Excellent 18.0 MHz | −20.1 dB | −0.1 dB | Excellent 21.0 MHz | −20.2 dB | −0.2 dB | Good 24.9 MHz | −20.4 dB | −0.4 dB | Good 28.0 MHz | −20.8 dB | −0.8 dB | Acceptable; use FT-50-61 for better flatness Overall flatness 3.5–28 MHz: ±0.5 dB (exceeds design goal of ±1 dB) At 1.8 MHz: ±0.5 dB — ACCEPTABLE; core AL value limits low-frequency response LOWER FREQUENCY LIMIT: f_low = Z_L / (2π × L_sec) where L_sec = AL × N² (secondary inductance) FT-50-43: AL = 523 nH/turn²; N=10; L_sec = 52.3 µH f_low = 50 / (2π × 52.3e-6) = 152 kHz → well below 160m band UPPER FREQUENCY LIMIT (FT-50-43): Core loss increases above 30 MHz; directivity decreases. Use FT-50-61 (AL=173 nH/T²) for 10–50 MHz extension: L_sec (10T, FT-50-61) = 17.3 µH f_low = 50/(2π×17.3e-6) = 460 kHz → still adequate for 160m ================================================================================ SECTION 5 — DIRECTIVITY ANALYSIS ================================================================================ DIRECTIVITY (dB) = 20 log₁₀ (V_fwd / V_rev) with matched load Theoretical (perfectly matched R, D, and winding): Infinite. Practical limits: Factor | Typical Error | Directivity Impact -------------------------------|---------------|------------------- Resistor mismatch (1% resistors)| 0.5% V error | ~46 dB (negligible) Diode Vf mismatch (5mV at 1mA) | 2% error | ~34 dB Winding parasitic capacitance | Frequency dep.| 30–50 dB HF Ground loop / shield leakage | Variable | 25–35 dB typical PCB layout (stray coupling) | Layout dep. | 25–40 dB TYPICAL MEASURED DIRECTIVITY: 1.8–7 MHz: >35 dB (excellent) 7–14 MHz: >30 dB (very good) 14–21 MHz: >28 dB (good) 21–30 MHz: >25 dB (acceptable) IMPROVING DIRECTIVITY: 1. Match diode pair: measure Vf at 1mA; select matched pair within 1mV 2. Twisted-pair secondary winding (reduces capacitive coupling) 3. Shield primary conductor (e.g., coax through toroid) 4. Use 1% resistors; match R1/R2 pair to within 0.5% 5. Short, direct PCB traces from toroid to diodes (minimize stray L, C) ================================================================================ SECTION 6 — −30 dB AND −40 dB VARIANTS ================================================================================ −30 dB VARIANT (32 TURNS): Replace T1: Wind 32 turns on FT-82-43 (larger core; 32T need bigger window) R_T: Keep at 50Ω Adjust voltage divider: R_1 = 5Ω, R_2 = 155Ω (ratio 1:32) OR: Keep R1=R2=50Ω; add 31× turns (N=32 → V_T is 1/32 of matched case) Compensate with voltage divider ratio to match. POWER HANDLING: Same as −20 dB version; secondary sees lower voltage MAX SECONDARY VOLTAGE: V_sec = √(P × Z0) / N = √(100×50)/32 = 2.2V_peak → safe −40 dB VARIANT (100 TURNS): Core: FT-140-43 or FT-140-61 (large window for 100T winding) R_T: 50Ω This variant is useful for: spectrum analyzer direct connection (no attenuator), power measurement of QRP rigs (milliwatt range), lab reference standard. At 100W: V_sec = √(P×Z0)/N = √(5000)/100 = 0.707V_peak → 354mV RMS → plenty for log amp (AD8307) or Schottky detector. COUPLING FACTOR TABLE: N turns | Coupling | Use case --------|----------|------------------------------------------- 10 | −20 dB | Field SWR meter, 100W transceiver 32 | −30 dB | Spectrum analyzer tap, wideband monitor 100 | −40 dB | Direct SA input, QRP power meter, calibration 316 | −50 dB | High-power amplifier monitoring (1 kW+) ================================================================================ SECTION 7 — INSERTION LOSS ================================================================================ INSERTION LOSS MEASUREMENT (50Ω source, 50Ω load): IL_total = IL_R1R2 + IL_T1 + IL_connector IL_R1R2 (voltage divider shunting main line): The parallel combination R1||R2 (if both 50Ω) = 25Ω shunts the main line. IL = 20 log₁₀(Z0/(Z0 + R_shunt/2)) ≈ 20 log₁₀(50/61.1) ≈ −0.7 dB CORRECTION: R1 and R2 connect DIFFERENTIALLY across the line, not as shunt to GND. In balanced bridge configuration: effective shunt = very high → IL < 0.01 dB In unbalanced (single-ended tap): IL depends on layout — keep <0.05 dB. IL_T1 (1-turn primary core loss): At 14 MHz: FT-50-43 core loss (1T primary): ≈ 0.002 dB at 100W At 30 MHz: ≈ 0.010 dB TOTAL INSERTION LOSS: < 0.05 dB (HF), < 0.1 dB (30 MHz) RETURN LOSS (VSWR at coupler ports): With matched line through conductor and grounded resistors: RL > 30 dB (SWR < 1.07:1) at all HF frequencies. ================================================================================ SECTION 8 — CALIBRATION PROCEDURE ================================================================================ REQUIRED EQUIPMENT: - Signal generator or transceiver (1W minimum, known-accurate power meter) - 50Ω precision termination (BNC, 1%) - Multimeter (DC millivolt range) - Optional: oscilloscope or VNA STEP 1 — NULL CALIBRATION (directivity verification): 1. Connect 50Ω precision load to J2 (output). 2. Apply 1W (30 dBm) CW to J1 (input). 3. Measure V_ref at J4 (reflected port) with multimeter. 4. V_ref should be < 10 mV DC. 5. If V_ref > 20 mV: check diode match; adjust R_T ±2Ω for null. STEP 2 — FORWARD CALIBRATION: 1. Maintain 50Ω load on J2. 2. Measure V_fwd at J3. 3. V_fwd = √(P_fwd × R_L) = √(1W × 2.2kΩ) = ... no, this is detector output. 4. V_fwd_detector = √(2 × P_coupled × R_L) × η_diode Where P_coupled = P_fwd × 10^(coupling_dB/10) = 1W × 0.01 = 10 mW V_RF_at_detector ≈ √(2 × 0.01 × 50) = 1.0 V_peak → after BAT41 (Vf≈0.23V): V_detector_DC ≈ 1.0 − 0.23 = 0.77V (approximate, frequency-dependent) 5. Record V_fwd at known power; build calibration table in firmware. STEP 3 — FREQUENCY RESPONSE: Sweep 1.8–30 MHz at constant power; record V_fwd vs. frequency. Plot correction table (or polynomial fit) in firmware. ================================================================================