Chapter 1 — Introduction and Scope
This manual covers the construction and operation of a homebrew antenna analyzer covering 0.1 MHz to 1.3 GHz using a two-stage RF source architecture: an AD9851 DDS for HF (0.1–30 MHz) and an ADF4351 fractional-N PLL synthesizer for VHF/UHF (30 MHz–1.3 GHz). The measurement front-end is an AD8302 gain/phase detector providing simultaneous magnitude and phase readout. Output is displayed on a CYD (ESP32 + 2.8” touchscreen) with Smith chart, SWR plot, and R+jX numerical display.
Chapter 2 — Theory of Operation
2-1 AD8302 Gain/Phase Detector
The AD8302 accepts two RF signals on INPA and INPB (50Ω each) and produces two DC outputs:
- VMAG: Proportional to |V_A / V_B| in dB (30 mV/dB, range −30 to 0 dBm per input).
- VPHS: Proportional to phase difference (10 mV/°, 0° to 180° range).
INPA receives the reference (forward-coupled) signal; INPB receives the reflected signal. The ratio VREFL/VFWD and the phase shift Δφ together yield the complex reflection coefficient Γ:
Γ = |V_refl / V_fwd| ∠ Δφ Z_ant = Z0 × (1 + Γ) / (1 − Γ) (Z0 = 50 Ω)
2-2 Directional Coupler
A multiband RF coupler (TM-TOOL-002-SCH-004) separates the forward and reflected waves on the transmission line to the DUT (antenna). Coupling factor is −20 dB on the HF section and −20 dB on the VHF/UHF section. Directivity must be ≥20 dB across the band to keep reflected signal isolation adequate for accurate Γ measurement.
2-3 Frequency Sources
AD9851 DDS (HF, 0.1–30 MHz): 125 MHz reference clock, 32-bit frequency word, phase noise −100 dBc/Hz at 1 kHz offset. Controlled via 3-wire SPI from ESP32. Sweep rate: ~1000 points/second.
ADF4351 PLL (VHF/UHF, 30 MHz–1.3 GHz): Fractional-N synthesizer, 32.768 MHz TCXO reference, phase noise −90 dBc/Hz at 10 kHz. Integer-boundary spurs require spur-avoidance in sweep software when crossing integer multiples of the PFD reference frequency.
Chapter 3 — Equipment and Materials
| Component | Part / Value | Purpose |
|---|---|---|
| Gain/phase detector | AD8302 LFCSP-16 | |Γ| and ∠Γ measurement |
| HF source | AD9851 DDS module | 0.1–30 MHz sweep |
| VHF/UHF source | ADF4351 module | 30–1300 MHz sweep |
| Directional coupler | Custom PCB | FWD/REF separation |
| Protection diodes | BAV99 + 100Ω | AD8302 input protection |
| Controller | ESP32 WROOM-32 | SPI, ADC, display driver |
| Display | ILI9341 2.8” CYD | Smith chart, SWR plot |
| Band switch | PE4259 SP4T | HF/VHF/UHF path selection |
| RF connectors | SMA female (×4) | DUT, source, ref ports |
| Power | 5V USB-C, 500 mA | All rails via LDO regulators |
Chapter 4 — Construction and Assembly
4-1 PCB Layout Notes
Route the RF signal paths (DDS/PLL output → coupler → DUT port) as 50Ω microstrip (width 2.9 mm on 1.6 mm FR4 with εr=4.6). Keep reference and reflected coupler outputs equal length to the AD8302 inputs. Length mismatch >5 mm introduces a phase error of approximately Δφ = 360° × ΔL / λ.
4-2 AD8302 Bias
The AD8302 requires ±5V dual supply. Derive from 5V USB with a MAX1044 charge pump for the −5V rail. Bypass each supply pin with 10 nF NP0 + 100 nF X5R within 3 mm of the device.
4-3 DDS Output Filtering
The AD9851 output contains harmonics and alias products. A 7-pole elliptic low-pass filter (cutoff 35 MHz) reduces spurious outputs to <−60 dBc before the coupler. Without this filter, harmonic reflections from the DUT appear as bearing errors at sub-harmonic frequencies.
Chapter 5 — Operating Procedures
5-1 SWR Sweep
- Connect antenna to DUT port (SMA). Select band (HF or VHF/UHF).
- Enter start/stop frequency and number of sweep points (101 or 201).
- Press SWEEP. The display plots SWR vs. frequency in real time.
- Identify the resonance (SWR minimum). Press MARKER; the instrument displays f_res, SWR, R, X at the marker frequency.
5-2 Smith Chart Display
- Select SMITH mode. The sweep traces the impedance locus on the Smith chart.
- Clockwise rotation with increasing frequency = capacitive reactance dominant (antenna too short). Counter-clockwise = inductive (antenna too long).
- At resonance, the locus crosses the real axis; R at crossing = feedpoint resistance. Ideal dipole: 72Ω (free space), lower over ground.
Chapter 6 — Calibration
6-1 SOLT Calibration
Before measuring an antenna, perform a one-port SOLT calibration at the DUT SMA connector (not at the instrument chassis):
- Connect SHORT (shorted SMA cap). Press CAL → SHORT.
- Connect OPEN (SMA cap with no connection). Press CAL → OPEN.
- Connect 50Ω LOAD (SMA terminator). Press CAL → LOAD.
- Press CAL → DONE. Calibration plane is now at DUT connector.
After SOLT cal, short should read SWR >50:1, open should read SWR >50:1, and 50Ω load should read SWR <1.05:1 across the calibrated band.
Chapter 7 — Verification and Acceptance
- Connect a precision 50Ω load (Pasternack PE6010 or calibrated terminator). Verify SWR <1.05:1 at all calibrated frequencies.
- Connect a known 100Ω resistor (1%, non-inductive). Verify R reads 100 ± 5Ω, X reads 0 ± 5Ω at 1 MHz.
- Connect a 50Ω + 50 nH load (resistor in series with known inductor). Verify jX reads within ±10% of calculated inductive reactance at 10 MHz.
- If any check fails, repeat SOLT calibration. Persistent errors indicate coupler asymmetry or AD8302 bias fault.
- Log: date, calibration kit used, frequency range, short SWR, open SWR, load SWR, 100Ω R/X readings.
Appendix A — Formulas
SWR = (1 + |Γ|) / (1 − |Γ|) |Γ| = (SWR − 1) / (SWR + 1) Return loss (dB) = −20 log10(|Γ|) Z_ant = 50 × (1 + Γ) / (1 − Γ) [complex arithmetic]
Appendix B — Worked Example
AD8302 reads VMAG = 2.10 V, VPHS = 0.75 V at 14.250 MHz.
Magnitude ratio (dB) = (2.10 − 1.80) / 0.030 = +10 dB [AD8302 midpoint = 1.80V] |Γ| = 10^(10/20) = 0.316 (not a valid interpretation here — see note) Correct: VMAG represents |V_INPA / V_INPB|. If VMAG midpoint (ratio = 1) = 900 mV, then: ratio_dB = (2100 − 900) / 30 = +40 dB (INPA is 40 dB stronger than INPB) |Γ| = 10^(−40/20) = 0.01 → SWR = 1.02:1 (near-perfect match)